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| Packages that use Memory | |
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| com.cmpware.cmp | |
| com.cmpware.cmp.models | |
| com.cmpware.fastmodel | |
| com.cmpware.tools | |
| Uses of Memory in com.cmpware.cmp |
|---|
| Subclasses of Memory in com.cmpware.cmp | |
|---|---|
class |
HardNode
This implements a hardwired node. |
class |
Processor
This implements the generic processor interface and mechanisms. |
| Uses of Memory in com.cmpware.cmp.models |
|---|
| Subclasses of Memory in com.cmpware.cmp.models | |
|---|---|
class |
ALU
This is a simple ALU processor. |
class |
ARC700
This is an AutoModel implementation of the ARC700 processor. |
class |
ARC700EX
This is an AutoModel implementation of the ARC700 processor with an extension. |
class |
AutoSimple
This is the 'Simple' processor produced using the AutoModel data-driven interface. |
class |
FastSimple
This is the 'Simple' processor produced using the FastModel data-driven interface. |
class |
HardNodeDemo
This gives an example of a HardNode. |
class |
LatticeMicro32
This is an AutoModel implementation of the LatticeMicro32 processor. |
class |
LM32
This is just a renaming of the LatticeMicro32 model. |
class |
MicroBlaze
This implements the Xilinx Microblaze according to the specification: "MicroBlaze Processor Reference Guide", Embedded Development Kit EDK 9.1.i (UG081 9/15/2006) |
class |
MicroBlaze_old
This implements the Xilinx Microblaze according to the specification: "MicroBlaze Processor Reference Guide", Embedded Development Kit EDK 6.3.i (UG081 August 24, 2004) |
class |
MIPS32
This is an AutoModel implementation of the MIPS32 processor. |
class |
MIPS32EX
This is an AutoModel implementation of the MIPS32 processor with an extension. |
class |
NIOS
This describes the Altera NIOS 32-bit CPU. |
class |
NIOS2
This is the model for the NIOS2 processor from Altera. |
class |
Null
This class implements a "null" spacer processor model. |
class |
PowerPC
This is an AutoModel implementation of the PowerPC processor. |
class |
PowerPC64
This is an AutoModel implementation of the PowerPC 64 bit processor istructions. |
class |
Sparc
This is the model for the SPARC 8 processor. |
class |
SPU
This is an AutoModel implementation of the Synergistic Processing Unit (SPU) used by the Cell broadband Engine. |
class |
Xtensa
This is an AutoModel implementation of the Tensilica Xtensa processor. |
class |
XtensaEX
This is an AutoModel implementation of the Xtensa processor with an extension. |
| Uses of Memory in com.cmpware.fastmodel |
|---|
| Subclasses of Memory in com.cmpware.fastmodel | |
|---|---|
class |
FastModel
This abstract class is used to describe the instruction set for a processor. |
class |
FastModel_old
This abstract class is used to describe the instruction set for a processor. |
| Uses of Memory in com.cmpware.tools |
|---|
| Subclasses of Memory in com.cmpware.tools | |
|---|---|
class |
AutoModel
This abstract class is used to describe the instruction set for a processor. |
class |
AutoModelVLIW
WARNING: This class contains experimental software for architectures with instructrion words greater than 32 bits. |
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