Proceedings of the fourth IEEE Symposium on FPGAs for Custom Computing Machines held in Napa Valley, California on April 17--19, 1996. Proceedings published by the IEEE Computer Society Press.

Steven Guccione / guccione@NOSPAM.io.com

[Albahama et al., 1996]

O. T. Albahama, P. Cheung, and T. J. Clarke. On the viability of FPGA-based integrated coprocessors. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 206-215, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Athanas and Hudson, 1996]

P. M. Athanas and R. Hudson. Using rapid prototyping to teach the design of complete computing solutions. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 90-97, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Bakkes et al., 1996]

P. J. Bakkes, J. J. duPlessis, and B. L. Hutchings. Mixing fixed and reconfigurable logic for array processing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 118-125, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Brown and Wenban, 1996]

G. Brown and A. Wenban. A software development system for FPGA-based data acquisition systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 28-37, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Chu and Li, 1996]

W. Chu and Y. Li. Aizup - a pipelined processor design and implementation on Xilinx FPGA chip. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 98-106, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Clark and Hutchings, 1996]

D. A. Clark and B. L. Hutchings. The DISC programming environment. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 195-203, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Cook et al., 1996]

T. A. Cook, L. Louca, and W. H. Johnson. Implementation of IEEE single precision floating point addition and multiplication on FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 107-116, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Culbertson et al., 1996]

W. B. Culbertson, R. Amerson, R. J. Carter, P. Kuekes, and G. Snider. Exploring architectures for volume visualization on the teramac custom computer. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 80-88, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Dai and Isshiki, 1996]

W. Dai and T. Isshiki. Bit-serial pipeline synthesis for multi-FPGA systems with C++ design capture. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 38-47, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Graham and Nelson, 1996]

P. Graham and B. Nelson. Genetic algorithms in software and in hardware - a performance analysis of workstations and custom computing machine implementations. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 216-225, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Gunther et al., 1996]

B. Gunther, G. Milne, , and L. Narasimhan. Assessing document relevance with run-time reconfigurable machines. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 10-17, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[King et al., 1996]

W. King, T. Drayer, R. Conners, and P. Araman. Using MORPH in an industrial machine vision system. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 18-26, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Knittel, 1996]

G. Knittel. A PCI-compatible FPGA-coprocessor for 2d/3d image processing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 136-145, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Luk et al., 1996]

W. Luk, N. Shirazi, and P. Cheung. Modelling and optimising run-time reconfigurable systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 167-176, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Mirsky and DeHon, 1996]

E. Mirsky and A. DeHon. MATRIX: A reconfigurable computing architecture with configurable instruction distribution and deployable resources. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 157-166, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Peterson et al., 1996]

J. B. Peterson, R. B. O'Connor, and P. M. Athanas. Scheduling and partitioning ANSI-C programs onto multi-FPGA CCM architectures. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 178-187, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Pocek and Arnold, 1996]

Kenneth L. Pocek and Jeffrey Arnold, editors. IEEE Symposium on FPGAs for Custom Computing Machines, Los Alamitos, CA, April 1996. IEEE Computer Society Press. Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines, FCCM 96.

[Pottier and Llopis, 1996]

B. Pottier and J. L. Llopis. Revisiting smalltalk-80 blocks: A logic generator for FPGAs. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 48-57, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Rajamani and Viswanath, 1996]

S. Rajamani and P. Viswanath. A quantitative analysis of processor - programmable logic interface. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 226-234, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Singh et al., 1996]

S. Singh, J. Hogg, and D. McAuley. Expressing dynamic reconfiguration by partial evaluation. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 188-194, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Villasenor et al., 1996]

J. Villasenor, B. Schoner, K. N. Chia, and C. Zapata. Configurable computing solutions for automatic target recognition. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 70-79, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Wittig and Chow, 1996]

R. Wittig and P. Chow. OneChip: An FPGA processor with reconfigurable logic. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 126-135, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Woods et al., 1996]

R. Woods, A. Cassidy, and J. Gray. VLSI architecture for FPGAs: A case study. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 2-9, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Yamauchi et al., 1996]

T. Yamauchi, S. Nakaya, and N. Kajihara. SOP: A reconfigurable massively parallel system and its control-data-flow based compiling method. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 148-156, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

[Yeh et al., 1996]

D. Yeh, G. Feygin, and P. Chow. RACER: A reconfigurable constraint-length 14 viterbi decoder. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 60-69, Los Alamitos, CA, April 1996. IEEE Computer Society Press.