Bibliography for the
2000 Reconfigurable Architectures Workshop
(RAW 2000)

Proceedings of the 7th Reconfigurable Architectures Workshop (RAW), part of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

Steven Guccione / guccione@NOSPAM.io.com


[Bondalapati and Prasanna, 2000]
Kiran Bondalapati and Viktor K. Prasanna. Loop pipelining and optimization for run time reconfiguration. In José Romlin et al., editor, Parallel and Distributed Processing, pages 906-915. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Brosch et al., 2000]
O. Brosch, J. Hesser, C. Hinkelbein, K. Kornmesser, T. Kuberka, A. Kugel, R. Manner, H. Singpiel, and B. Vettermann. ATLANTIS -- a hybrid FPGA/RISC based re-configurable system. In José Romlin et al., editor, Parallel and Distributed Processing, pages 890-897. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Diessel and Milne, 2000]
Oliver Diessel and George Milne. Compiling process algebraic descriptions into recongurable logic. In José Romlin et al., editor, Parallel and Distributed Processing, pages 916-923. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Feng et al., 2000]
Wenyi Feng, Fred J. Meyer, and Fabriio Lombardi. Complexity bounds for lookup table implementation of factored forms in FPGA technology mapping. In José Romlin et al., editor, Parallel and Distributed Processing, pages 951-958. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Guccione et al., 2000]
Steven A. Guccione, Delon Levi, and Daniel Downs. A reconfigurable content addressable memory. In José Romlin et al., editor, Parallel and Distributed Processing, pages 882-889. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Hochberger et al., 2000]
Christian Hochberger, Rolf Hofmann, Klaus Peter Volkmann, and Stefan Waldschmidt. The cellular processor architecture CEPRA-1X and its conguration by CDL. In José Romlin et al., editor, Parallel and Distributed Processing, pages 898-905. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[jie Zhang and wing Ng, 2000]
Xue jie Zhang and Kam wing Ng. Module allocation for dynamically reconfigurable systems. In José Romlin et al., editor, Parallel and Distributed Processing, pages 932-940. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Keller, 2000]
Eric Keller. JRoute: A run-time routing API for FPGA hardware. In José Romlin et al., editor, Parallel and Distributed Processing, pages 874-881. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Lakshmikanthan et al., 2000]
Preetham Lakshmikanthan, Sriram Govindarajan, Vinoo Srinivasan, and Ranga Vemuri. Behavioral partitioning with synthesis for multi-FPGA architectures under interconnect, area, and latency constraints. In José Romlin et al., editor, Parallel and Distributed Processing, pages 924-931. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Pan, 2000]
Yi Pan. Constant-time hough transform on a 3D reconfigurable mesh using fewer processors. In José Romlin et al., editor, Parallel and Distributed Processing, pages 966-973. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Romlin et al., 2000]
José Romlin et al., editor. Parallel and Distributed Processing. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000. Lecture Notes in Computer Science 1800.

[Tanougast et al., 2000]
Camel Tanougast, Yves Berviller, and Serge Weber. Optimization of motion estimator for run-time-reconfiguration implementation. In José Romlin et al., editor, Parallel and Distributed Processing, pages 959-965. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.

[Zhou and Martonosi, 2000]
Xianfeng Zhou and Margaret Martonosi. Augmenting modern superscalar architectures with configurable extended instructions. In José Romlin et al., editor, Parallel and Distributed Processing, pages 941-950. Springer-Verlag, Berlin, May 2000. 7th Reconfigurable Architectures Workshop (RAW), part of the Proceedings of the 15th International Parallel and Distributed Processing Symposium (IPDPS) Workshops 2000 held in Cancun, Mexico May 1-5, 2000. Published in the series Lecture Notes in Computer Science 1800.